The present invention relates to a semiconductor device and, in particular to a high breakdown voltage and a high speed bipolar type semiconductor device suitable for use in an integrated circuit, such as a high breakdown voltage and a high speed bipolar type transistor.
As for a transistor for use in a power IC or in LSI and transistor for a signal, a high breakdown voltage and a high speed bipolar type semiconductor device is required. However, in a single transistor, it is difficult to achieve the characteristics of high speed and high breakdown voltage at the same time.
More specifically, it is often the case with prior art devices of the above-mentioned type that when one characteristic is improved, another characteristic is sacrificed to some degree. For example, in order to obtain a high speed transistor, a base width of the transistor is made narrow. Consequently, breakdown voltage is sacrificed.
Because a high breakdown voltage and high speed in a bipolar type transistor cannot realized in practical terms, as is especially the case with a bipolar linear type IC, the following problems will occur.
In the bipolar linear-type IC, in order to increase the degrees of freedom for designing a circuit and to simplify a circuit structure, both n-p-n transistor and p-n-p transistor are used together. For such a configuration, in order to lessen a number of manufacturing processes, the n-p-n transistor is formed with a vertical type structure and the p-n-p transistor is formed with a horizontal (lateral) type structure.
In the lateral type p-n-p transistor, in an "off" condition, a depletion layer spreads out to a semiconductor base substance region having a low impurity concentration. As such, it is necessary to prevent a punch-through phenomenon in which the depletion layer reaches to an emitter junction and then the current flows.
For this reason, an interval (base width) between an emitter region and a collector region is formed wider than the width of the depletion layer in the voltage to be checked by the transistor. As a result, an operation frequency of the lateral type p-n-p transistor lowers remarkably compared with that of the vertical structure n-p n transistor.
As an element structure for solving the problems in the above stated lateral type transistor, p-n-p transistor disclosed in Japanese patent laid-open publication No. 127865/1984 is known.
In this n-p-n transistor, n-type base region is formed on one main surface side of n-type base substance region. This n-type base region has a higher impurity concentration than that of the base substance region, and a p-type emitter region is formed in this n-type base region.
In the same base substance region, a first p-type collector region is formed separately from the n-type base region. Further, a second p-type collector region is formed so as to contact to the first p-type collector region and further so as to surround around the n-type base region. The second p-type collector region has a lower impurity concentration than those of the first p-type collector region and the n-type base region.
In a p-n-p transistor having the above stated structure, the depletion layer mainly spreads out toward the second collector region having the low impurity concentration. Accordingly, even though the width of the n-type base region is formed to be narrow, the pinch-through phenomenon does not occur. As a result, both the breakdown voltage and the operation frequency in the p-n-p transistor can be improved at the same time.
There is, however, at least one limitation associated with using the above-stated lateral type n-p-n transistor. This limitation relates to the obtainment for the high frequency. Namely, the cutoff frequency f.sub.T is 70 MH.sub.z degree at the breakdown voltage of 100 V, and in the breakdown voltage of 350 V the cutoff frequency f.sub.T is 25 MH.sub.z degree. These cutoff frequency f.sub.T values are 1/5-1/10 in comparison with the value in the n-p-n transistor having the same breakdown voltage.
For the above reasons, performance of bipolar linear type ICs are limited by the characteristics of the lateral type p-n-p transistor.
Moreover, in general, in a power IC, LSI and a transistor for signal, a high breakdown voltage, a high current amplification factor and a high speed transistor is needed. However, it is difficult to realize the above-stated characteristics at the same time.
In order to realize the high current amplification factors required, methods are known in the prior art for thinning a base region according to under the scarification of the breakdown voltage, and methods are known for forming a Darlington transistor structure according to under the scarification in speed.
For example, in a bipolar linear type IC, serious adverse effects occur when a high breakdown voltage, a high current amplification factor, and a high speed bipolar type transistor are not realized at the same time. This is so because, in the lateral structure n-p-n transistor, a collector conjunction breakdown voltage is attained by the spread of a depletion layer in a base region (semiconductor base substance region) having a low concentration.
In order to prevent a punch-through phenomenon an interval (base width) between an emitter and a collector is designed to be wider than the width of the depletion layer in a design breakdown voltage in a collector conjunction. As a result, the current amplification factor is lowered remarkably compared with the vertical structure transistor.
In order to solve the above stated problems in the lateral type transistor, various kinds of the element structures have been proposed. One p-n-p transistor is disclosed, for example, in the above-stated Japanese patent laid-open No. 127865/1984.
With the above stated transistor structure, during a low voltage application time, the second p-collector region becomes the collector, and during a high voltage application time the depletion layer spreads out in the second p-collector region, and further the first collector becomes the collector.
As a result, the current amplification factor, the cutoff frequency, and the breakdown voltage of the transistor can be improved at the same time.
However, the above transistor structure pays no attention to the base resistance during use of the linear IC, and since the base resistance is large, a problem occurs in which the noise voltage is made large. In order to solve this problem, a transistor structure shown in Japanese patent laid-open No. 132037/1991 is well known.
In the above transistor structure, a part of the first collector region for surrounding around the n-base region in the p-n-p transistor disclosed in the above stated Japanese patent laid-open No. 127865/1984 is released.
In the released part the n-base region having a high impurity concentration is connected to a second base region having high impurity concentration for use in an external portion base electrode of the first collector region.
According to this transistor structure, the base resistance can be made small, as a result the p-n-p transistor having the low noise voltage can be formed.
An example with respect to the p-n-p transistor having the high breakdown voltage and the high speed linear type IC as an exemplified and representative problem will be explained.
In order to realize the high breakdown voltage and the higher speed linear type integrated circuit (IC), a plan view and a cross-sectional view showing the lateral type p-n-p transistor disclosed in the above stated Japanese patent laid-open No. 132047/1991 are shown in FIG. 21 and FIG. 22.
In order to improve the cutoff frequency, when a width of the n-base region 202, forming an effective operation region between p-emitter region 203 and p-collector region 206, is narrow, the contribution degree afforded to the base resistance and the collector resistance becomes large. Consequently, the base resistance and the collector resistance are needed to be reduced.
Moreover, in order to obtain a high breakdown voltage, the length of the second collector region 206, working as the electric field relaxation region between the n-base region 202 and the first p-collector region 204, becomes longer. As a result, the collector resistance increases. Further, the distance of the second n-base region 205 drawn from the n-base region 202 becomes long, and as a result the base resistance increases.
In order to reduce the resistances, the base impurity concentration of the drawn-out portion is made higher than that of the first n-base region 202. During the reversal bypass application time of the transistor, the electrolyte concentration at the contact portion of the impurity material at the second p-collector region 206 and the second n-base region 205 is remarkable, thereby a lowering in the breakdown voltage is invited.
In order to prevent a lowering in the breakdown voltage, a lowering in the impurity concentration of the second collector region 206 is needed. As a result, the collector resistance increases and a lowering in the cutoff frequency occurs.
Moreover, in this transistor, in order to increase the current capacity, the emitter region 203 is made long toward an opposite side of the second n-base region 205, since the relation between the first n-base region 202 and p-emitter region 203 is determined according to the current amplification factor.
As a result, during the high current operation time, the voltage between the emitter and the base become low, going to toward an opposite side of the direction of the second n-base region 205. Because of a non-uniformity in the voltage between the emitter and the base, a lowering in the current amplification factor, the cutoff frequency, and the noise voltage in the high current region occur.